• Home
  • Projects
    • Project proposals
    • in progress Projects
    • Project-Archive
  • Experiment
  • Members
    • Academic staff
    • Lab staff
    • Supervisors
    • Students
  • Research
    • THE ISRAELI SHORT RANGE COMMUNICATION CONSORTIUM (“ISRC”)
    • tera-santa
    • peta-cloud
  • Publications
  • Events
    • All Events
    • Seminars
    • Conferences
  • The System Architecture Labs Cluster
    • HSDSL
    • CommLab
    • VLSI
    • SAMPL
    • ASIC^2
    • PSL
  • About Us
  • Accessibility statement
Technion
Technion
  • Home
  • Projects
    • Project proposals
    • in progress Projects
    • Project-Archive
  • Experiment
  • Members
    • Academic staff
    • Lab staff
    • Supervisors
    • Students
  • Research
    • THE ISRAELI SHORT RANGE COMMUNICATION CONSORTIUM (“ISRC”)
    • tera-santa
    • peta-cloud
  • Publications
  • Events
    • All Events
    • Seminars
    • Conferences
  • The System Architecture Labs Cluster
    • HSDSL
    • CommLab
    • VLSI
    • SAMPL
    • ASIC^2
    • PSL
  • About Us
  • Accessibility statement

Prof Yitzhak (Tsahi) Birk

Yitzhak Birk
Academic Supervisor
Phone:+972-48294637
Room: Meyer 918
Email:
Homepage:

  • Intel-Altera-FPGA

    ...

  • מצטיינים אשכול “ארכיטקטורת מערכות” 2017

    ...

Project tags

Algorithm ARM Classification Decoder Deep Learning Encoder Epiphany Flash FPGA GPU IOT Mesh Neural Networks parallela partial reconfiguration smarthome SmartPhone Software TLC Zboard



  • Accessibility statement

Join Us on Facebook

Facebook
PSL – Parallel Systems Laboratory - Andrew & Erna Viterbi Faculty of Electrical & Computer Engineering | Technion | Powered byFatfish