FPGA

  • Flash decoder/encoder

    in Flash ,Block Erase operations are costly both in execution time as well as in the chips durability (~10,000 erase cycles and chip will malfunction). using Write Only Memory Coding we can reduce the need for Erase operations , extending the chips durability by sacrificing space.
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  • Hardware DLL

    Hardware DLL

    PGA technology provides the flexibility of on-site programming and re-programming without going through re-fabrication with a modified design. Partial Reconfiguration (PR) takes this flexibility one step further, allo wing the modification of an operating FPGA design by loading a partial configuration file, usually a partial BIT file. After a full BIT file configures the FPGA, partial BIT files can be downloaded to modify reconfigurable regions in the FPGA without compromising...
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  • zboard

    Hardware DLL part II

    PGA technology provides the flexibility of on-site programming and re-programming without going through re-fabrication with a modified design. Partial Reconfiguration (PR) takes this flexibility one step further, allo wing the modification of an operating FPGA design by loading a partial configuration file, usually a partial BIT file. After a full BIT file configures the FPGA, partial BIT files can be downloaded to modify reconfigurable regions in the FPGA without compromising...
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